The present invention relates generally to electrical connectors and, more particularly, to a system and method for attaching a pin grid array (PGA) socket with embedded power and ground planes to a printed circuit board.
As microprocessor frequencies continue to increase, the assembly of the microelectronic package is taking on greater importance, particularly in the area of power delivery performance and the I/O (signal) performance of the system.
A typical central processing unit (CPU) package includes an integrated circuit (IC) (i.e., a silicon chip) mounted to a substrate with an epoxy-based material. The substrate, in turn, is usually mounted to a large printed circuit board known as a motherboard using a socket or similar type of electrical connector. For instance, certain high-performance computer systems use a pin grid array (PGA) socket. The substrate connects to the PGA socket through metal pins making multiple contacts in a matrix arrangement. The PGA socket and sockets of various other configurations provide versatility to computer systems by allowing integral components, such as microprocessors, to be readily removed for upgrades or repairs. In addition, the PGA socket allows computer manufacturers to decide which version of microprocessor to utilize at the last moment before shipping the product.
Nevertheless, one of the biggest setbacks for socket performance in the overall power delivery network, especially for CPU applications, is the high inductance and resistance of socket pins. The conventional method for improving power delivery performance is by placing decoupling capacitors on the top of the substrate surrounding the IC and by connecting them to internal power and ground distribution planes within the substrate. This method was adequate when IC""s were smaller, ran at lower frequencies, and didn""t require much power. However, with modern IC""s the space from the edge of the IC to the center of the IC introduces noteworthy distributed inductance and resistance which makes external decoupling less effective.
Therefore, it would be advantageous to provide decoupling capacitors in other areas of the CPU package (i.e., the bottom side), thus minimizing the problem of inductance in modern high-speed, high-performance CPU packages.